MemSilicon Raises Over RMB 400 Million and Hires an Ex-Graphcore President to Build an LPU for Agentic Inference

A Chinese memory-chip startup is making an unusually direct bet on the inference bottleneck. MemSilicon, a Beijing company spun out of the resistive-RAM research group of Chinese Academy of Sciences academician Liu Ming, announced on October 19 that it has raised a Series A above 400 million yuan - roughly $56 million - led by Boyuan Capital, with Bosch Ventures, Chuangling Capital, game publisher miHoYo, Zhongguancun Science City and flash maker GigaDevice among the investors, and existing backers including Xiaomi Strategic Investment adding on.

The same announcement carried a management change with more signal than the money. Lu Tao, previously president of Graphcore and head of its Greater China business, has joined as CEO and co-founder. His two decades in the industry also include a vice presidency at photonic-computing startup LightIntelligence and a run as China general manager at network-chip maker Cavium, covering Arm server CPUs, DPUs, silicon photonics and large-SRAM AI processors. Boyuan Capital managing partner Jiang Hongquan tied the bet to that history directly, saying trust in the team goes back to the Graphcore relationship a decade ago.

MemSilicon arrives at the LPU from the memory side rather than the compute side. Its foundation is RRAM, a nonvolatile memory technology where the team claims twenty years of work across materials, devices, process integration and chip design. On October 14, one week before the funding news, the company said its first high-density RRAM chip, Mount Tai No.1, had completed tapeout: a 28nm CMOS part using a 1T4R cell structure on the 1TnR route, where multiple storage cells share one select transistor. The company lists 1Gb of capacity per die, 30Mb per square millimeter of density, access latency under 20 nanoseconds, and on-chip hardware error correction.

The new product ambition rests on an argument about where inference time actually goes. Citing an arXiv workload characterization of agentic AI, the company notes that when input caches hit, decoding accounts for 91.0 to 98.6 percent of LLM execution time - every generated token means shuttling model weights and KV cache back and forth, which is a memory-bandwidth problem more than a FLOPS problem. Stacking GPUs cuts latency but drives up power, network complexity and unit cost, while batch-heavy serving raises throughput at the expense of the interactive agents users actually wait on.

Hence the LPU program. MemSilicon says its first-generation inference chip, now in development, is aimed at the requirements agentic workloads create: low latency, long context and high throughput. The stated targets are aggressive - support full-precision trillion-parameter models without quantization or speculative decoding, and deliver 1,000 tokens per second per user, against the tens-to-low-hundreds of tokens per second that mainstream cloud services deliver on long-context requests. The company positions itself in the premium tier of the token market, arguing that in key scenarios a timeout is a failure, and that customers will increasingly buy on a speed-per-cost ratio rather than peak compute.

The caveats deserve equal billing. The LPU has not taped out, has no measured performance data, and its core team is on the order of a dozen people covering hardware, compilers and system software. The first generation will use more conventional memory rather than the RRAM the company is known for, with the resistive-RAM legacy scheduled to enter later iterations. Groq has already proven that low-latency LPU inference works in narrow settings, and Nvidia has not slowed down; Chinese startups are circling the same niche.

The funding buys MemSilicon what early silicon companies rarely get: a two-to-three-year window to prove that a team built on memory devices can ship a system-level inference product, and that storage-side innovation translates into speed and cost that customers can feel in agentic workloads. Tapeout to volume, not the announcement, is the test that matters.