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Powerlattice Raises $86 Million to Attack AI's Power Wall With a Voltage Regulator on a Single Chip

Powerlattice Raises $86 Million to Attack AI's Power Wall With a Voltage Regulator on a Single Chip

Powerlattice, a Vancouver, Washington startup building power delivery chiplets for AI processors, has raised $86 million of a $111 million target, according to an SEC filing made public Friday — nearly triple the $31 million it raised when it emerged from stealth last year. The company says shortening the path power travels to the processor can cut energy waste by more than half, a claim that remains to be independently verified.

Powerlattice, a semiconductor startup that wants to rewire how electricity reaches AI processors, has raised $86 million in new funding, according to a Securities and Exchange Commission filing made public Friday. The round, which counts 18 investors so far, is part of a push toward $111 million in total and nearly triples the $31 million the Vancouver, Washington company had raised when it emerged from stealth last November with a $25 million Series A led by Playground Global and Celesta Capital. The company declined to comment on the financing or name its new investors.

The problem Powerlattice targets is one that has quietly become the binding constraint on AI data centers. Modern accelerators draw so much current, so fast, that routing power over conventional distances wastes a meaningful share of it as heat — and data center operators are now running into hard limits on available electricity and cooling. The company builds what it calls a power delivery chiplet: a small component that sits inside the processor package itself, shortening the path current has to travel. It says that cutting the distance can reduce energy waste by more than half while boosting performance — a figure the company cites from its own testing that has not been independently verified.

Earlier this week, the company announced what it describes as the industry's first monolithic integrated voltage regulator chiplet, packing the controller, the power transistors and the inductors onto a single piece of silicon. In testing, the chiplet powered a device built to mimic the fast-shifting electrical loads of next-generation AI accelerators, and multiple chiplets can be linked to act as one, letting chip designers scale the configuration to their processors. Breaking through the AI power wall requires us to rethink how power reaches the processor, chief executive Peng Zou said in the announcement.

The team has deep silicon pedigree. Zou founded the company in 2023 with Gang Ren and Sujith Dermal, all veterans of Qualcomm, Intel and NUVIA, the chip startup Qualcomm acquired in 2021. The company operates out of Vancouver, Chandler, Arizona, San Jose and Hsinchu, Taiwan. Board members listed in the filing include former Intel CEO Pat Gelsinger, now a general partner at Playground, alongside Steve Fu of Celesta and Wen Hsieh of Matter Venture Partners. AI is not constrained by capital, it is constrained by power, Gelsinger said when the Series A was announced.

Power delivery has quietly become its own funding lane as the AI buildout hits physical limits, with established players like Vicor fighting patent battles over the same territory in international trade courts. If Powerlattice's monolithic approach holds up outside the lab, the next question is which accelerator designer puts it in a package first — and whether the power savings survive contact with production hardware.

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