Chinese Startup Anazhixin Tapes Out AX100, an Analog Chip It Says Solves Matrix Equations in Under 100 Nanoseconds

Almost everything an AI system does, underneath, is solve matrix equations. Parameter updates during training, a robot's real-time motion control, spatial planning, and wireless baseband signal processing all reduce to the same mathematical chore. Digital hardware handles it by brute force: solving a 512th-order matrix equation takes roughly 500 million multiply-accumulate operations and tens to hundreds of microseconds. A Beijing-based startup called Anazhixin says it has built hardware that takes a different route entirely — and on November 15 it told China's official Science and Technology Daily that its AX100 chip, taped out in October, is the world's first fully integrated analog processor that solves matrix equations in one physical step.

The claimed numbers are striking. A single matrix equation solve takes under 100 nanoseconds, at about 80 milliwatts per computation, matching the company's simulation and design expectations. Instead of converting the problem into billions of discrete instructions, AX100 maps the matrix equation directly onto a circuit: the physics of the circuit settles into equilibrium, and the answer is read out once, with no iteration. That is the founding idea of analog computing, an approach that dominated early computation and then lost to digital logic for decades because of precision and scalability problems.

Those problems are exactly what the chip builds on. In October 2025, a team led by Sun Zhong at Peking University's Institute for Artificial Intelligence published work in Nature Electronics raising analog computing precision from the roughly one-percent level to one part in ten million — an improvement that commentators at the time said revived a long-ignored field. One year later, Anazhixin has moved that laboratory result onto a production line. The company emphasizes that AX100 does not depend on advanced process nodes: it is manufactured on mature processes, giving it a fully domestic supply chain and insulation from the export-control pressures that constrain China's digital AI chip builders.

The company reports tests in three domains. For model training, on a 2.93-million-parameter autoencoder and a 2.72-million-parameter Transformer, a second-order optimization scheme running on the analog substrate cut training update consumption by 92 percent and 56 percent respectively. For embodied intelligence, the chip is claimed to speed up end-to-end robot motion control and planning algorithms by 150 to 500 percent, and core steps of 3D reconstruction and SLAM — real-time localization and mapping — by 200 to 500 percent. For wireless communication, on a 128-by-128 channel Gram matrix, the company says equivalent throughput is 20 to 207 times that of existing digital ASICs and GPUs, with 27.6 to 61.3 times better energy efficiency.

Every one of those numbers comes from the company's own testing, presented through a state newspaper interview, and none has been independently verified; the benchmark conditions, dataset details and measurement methodology have not been published. Analog computing has a long history of laboratory results that did not survive contact with real workloads, which is why the field's revival — and any single chip claiming a thousand-fold advantage — deserves verification before design decisions rest on it.

The academic ground is moving in parallel. On November 11, Chinese media reported that Sun Zhong's team, together with researchers at Politecnico di Milano and IBM Research Zurich, published a unified framework for what they call "modern analog computing" — a field that has shifted from differential equations to matrix computation, from silicon analog circuits to resistive memory devices, and toward hybrid analog-digital architectures. The framework's purpose is to give a rapidly warming field common definitions, a sign that researchers see it as more than a boutique curiosity.

CEO Xiang Rui told Science and Technology Daily that AX100 shares no architecture or underlying logic with GPU-class digital chips, and that Chinese companies have their first real chance to help define an entire computing paradigm — what he called overtaking on a different road rather than chasing on the same one. The commercial claim to watch is cost: a matrix solver that runs on mature process nodes, at milliwatt power levels, targets precisely the low-latency, low-power edge compute that robots, base stations and embedded AI systems need, a market digital GPUs serve badly and expensively. If the numbers hold up under independent testing, analog matrix compute becomes a credible niche technology; if they do not, the field will have learned that, too. Either way, the tape-out is a notable data point in the search for compute that does not depend on the bleeding edge of lithography.