Tesla is trimming the memory inside its next-generation AI chips to keep Optimus production on schedule — and the back-and-forth over the final numbers, all conducted in public on X by Elon Musk, offers an unusually candid look at how the DRAM shortage is now reshaping silicon roadmaps.
On October 2, Musk wrote that Tesla had cut the AI5 chip's memory "in half (now 72GB of LP5)" and reduced AI6 "to a third (now 144GB of LP6)," adding: "This was the only way to get enough volume for Optimus production and greatly reduces cost." The framing was pure supply chain: when a component is scarce, you redesign around what you can actually buy in the millions of units.
Then, within roughly a day, he partially walked it back. "Actually, we decided to bump AI5 up a little to 96GB," he wrote, explaining that otherwise Tesla would be the only company using the smallest LPDDR5 memory configuration — a scenario that would leave it with a bespoke part, worse pricing, and no second source. The final stated configuration: AI5 at 96GB of LPDDR5, AI6 at 144GB of LPDDR6. Both figures are down sharply from earlier plans that put AI5 at 144GB.
Musk's technical argument is that the bottleneck is bandwidth, not capacity. He has said memory bandwidth is a bigger constraint on Optimus than total memory, that bandwidth is unchanged in the new configuration, and that the performance impact on the humanoid robot should be minimal. That claim — a vendor assessment, not an independently verified benchmark — rests on the idea that a robot's real-time inference workload is limited by how fast data moves, not how much can be stored.
Context matters here. Tesla's own investor materials previously described AI5 as targeting a 50x improvement over AI4, including 10x raw compute and 9x memory capacity, with AI5 production planned for 2027 and AI6 for 2028; the AI5 taped out in April. Musk has separately claimed a single AI5 matches an NVIDIA Hopper-class part, two together rival Blackwell, and that it delivers roughly three times the performance per watt at a tenth of the cost — all company claims. The memory cut effectively walks back the 9x memory-capacity leg of that pitch.
The backdrop is a memory market that TrendForce expects to stay tight: its September 30 report projected conventional DRAM contract prices rising 10 to 15 percent quarter-on-quarter in Q4 2026, with AI servers and HBM soaking up advanced-node wafer capacity and squeezing standard DRAM supply. Micron has added that Level 4+ autonomous vehicles typically need more than 200GB of memory, with humanoid robots expected to have comparable requirements — which is precisely why a company planning robots "in the millions" cannot treat DRAM as a fixed spec.
The arithmetic is the real story. If Optimus ever ships at the volumes Musk envisions, every 48GB trimmed from a single robot's memory translates into enormous procurement savings and freed-up wafer allocation — and Tesla is clearly willing to trade headline specifications for shipment volume. For autos the same logic applies: AI5 is destined for vehicles too, where cost per unit dominates engineering decisions.
Whether the bet works depends on what Optimus is actually asked to do on-device. Bandwidth-first designs can absolutely compensate for lower capacity with model compression, quantization and SRAM-heavy architectures — but if Tesla later wants larger local models running on the robot, the smaller memory envelope becomes a ceiling. Musk has already left the door open, noting larger-memory variants could be added later. The precedent is worth watching: physical AI hardware is now being designed around what the supply chain can ship, not around what looks best on a spec sheet.
Comments (0)
Log in to join the discussion
Log InNo comments yet